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Коледни чудеса Папка – Голямо Книги, 8 ноември 2023 - Книги

Коледни чудеса Папка – Голямо Книги, 8 ноември 2023 - Книги

Depuis le début de la publication de sa série “L’Orpheline des Neiges” se déroulant au Québec, Marie-Bernadette Dupuy a connu un succès phénoménal qui n’a jamais faibli, poursuivant inlassablement le transport de ses lecteurs à travers ses romans et séries entremêlant aventure, amour, mystère, et enquête, tels que “Le cachot de Hautefaille”, “Abigaël”, “Les fiancés du Rhin”, et bien d’autres, explorant les destins de grandes héroïnes ou d’épopées familiales sur plusieurs générations. Son renom s’étend à l’échelle mondiale, avec des traductions jusque en Russie. Broché:300 pages ISBN-10:2702189784 ISBN-13:978-2702189788 Poids de l’article:460 g Dimensions:15,4 x 2,5 x 23,5 cm
GS2971AIBE3

GS2971AIBE3

The GS2971A is a multirate SDI integrated Receiver which includes complete SMPTE processing, as per SMPTE 425M, 292M and SMPTE 259MC. The SMPTE processing features can be bypassed to support signals with other coding schemes. The GS2971A integrates Gennum's adaptive cable equalizer technology, achieving unprecedented cable lengths and jitter tolerance. It features DC restoration to compensate for the DC content of SMPTE pathological signals. The device features an Integrated Reclocker with an internal VCO and a wide Input Jitter Tolerance (IJT) of 0.7UI. A serial digital loopthrough output is provided, which can be configured to output either reclocked or nonreclocked serial digital data. The serial digital output can be connected to an external cable driver. The device operates in one of four basic modes SMPTE mode, DVBASI mode, DataThrough mode or Standby mode.
EP103T

EP103T

The EP103T LVDS transmitter supports transmission between the host and the flat panel display up to SXGA+ resolutions. The transmitter converts 25 bits (8bits/color, 2 dummy bits) of Low Voltage TTL data and 3 control bits into 4 LVDS (Low Voltage Differential Signal) data streams. At a maximum input clock rate of 135MHz, each LVDS differential data pair speed is 945Mbps, providing a total throughput of 3.78Gbps. The transmitter can be configured to input clock rising edge or falling edge strobe through an external pin. Support 10MHz to 135MHz clock rates for HVGA to SXGA+ resolution Up to 3.78Gbps bandwidth PLL requires no external components Cycletocycle jitter rejection 3.3V to 1.8V Low Voltage TTL tolerant Input Programmable data and control strobe select Power down mode supported
SG2016 КАНТАР

SG2016 КАНТАР

SG2016 CAN Frenquency range:1.2 MHz to 75 MHz Supply voltage:1.8 V ti 3.3 V typ. Function:Standby External dimensions:2.0 x 1.6 x 0.7 mm Output:CMOS